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1 for more information www.linear.com/ltm4644 n quad output step-down module ? regulator with 4a per output n wide input voltage range: 4v to 14v n 2.375v to 14v with external bias n 0.6 v to 5.5v output voltage n 4a dc, 5a peak output current each channel n up to 5.5w power dissipation (t a = 60c, 200 lfm, no heat sink) n 1.5% total output voltage regulation n current mode control, fast transient response n parallelable for higher output current n output voltage tracking n internal temperature sensing diode output n external frequency synchronization n overvoltage, current and temperature protection n 9mm 15mm 5.01mm bga package typical application features description quad dc/dc module regulator with configurable 4a output array the lt m ? 4644/LTM4644-1 is a quad dc/dc step-down module ( micromodule) regulator with 4 a per output. outputs can be paralleled in an array for up to 16 a capabil - ity. included in the package are the switching controllers, power fets, inductors and support components. operating over an input voltage range of 4 v to 14 v or 2.375 v to 14v with an external bias supply, the ltm4644/LTM4644-1 supports an output voltage range of 0.6 v to 5.5 v. its high efficiency design delivers 4 a continuous (5 a peak) output current per channel. only bulk input and output capacitors are needed. ltm4644 LTM4644-1 top feedback resistor from v out -to-v fb (one resistor per channel) integrated 60.4k 0.5% resistor external (to be added on pcb) application general applications to inter face with pmbus power system management supervisory ics such as the ltc2975 configurable output array* 4a 4a 4a 4a 8a 4a 4a 12a 4a 16a * note 4 click to view associated techclip videos. 1.5v output efficiency and power loss (each channel) applications n multirail point of load regulation n fpgas, dsps and asics applications 4v to 14v input, quad 0.9v, 1v, 1.2v and 1.5v output dc/dc module regulator* all registered trademarks and trademarks are the property of their respective owners. 4644 4 4 4 4644 6 4 4 4 4 4 4 4 4 4 4 4 4 64 4 4 4 4 4 4 6 load current (a) 0 55 efficiency (%) power loss (w) 75 80 85 95 1 4644 ta01b 70 65 60 90 0 0.5 1 2 1.5 4 2 3 v in = 5v v in = 12v ltm4644/LTM4644-1 4644fe
2 for more information www.linear.com/ltm4644 absolute maximum ratings v in , sv in ( per channel ) .............................. C 0.3 v to 15 v v out ( per channel ) ( note 3) ............ C0. 3 v to sv in or 6v run ( per channel ) ..................................... C 0.3 v to 15 v intv cc ( per channel ) ............................... C 0.3 v to 3.6 v pgood , mode , track / ss , fb ( per channel ) ................................... C 0.3 v to intv cc clkout ( note 3), clkin ....................... C 0.3 v to intv cc internal operating temperature range ( notes 2, 5) ............................................ C 40 c to 125 c storage temperature range .................. C 55 c to 125 c peak solder reflow body temperature ................. 245 c (note 1) 4 6 4 4 4 4 4 4 4 4 4 4 t jmax = 125c, jctop = 17c/w, jcbottom = 2.75c/w, jb + ba = 11c/w, ja = 10c/w values per jesd 51-12 weight = 1.9g pin configuration part number pad or ball finish part marking* package type msl ra ting temperature range (see note 2) device finish code lt m 4644ey#pbf sac305 (rohs) lt m 4644y e1 bga 3 C40c to 125c lt m 4644iy#pbf sac305 (rohs) lt m 4644y e1 bga 3 C40c to 125c lt m 4644 mpy #pbf sac305 (rohs) lt m 4644y e1 bga 3 C55c to 125c lt m 4644iy snpb (63/37) lt m 4644y e0 bga 3 C40c to 125c lt m 4644 mpy snpb (63/37) lt m 4644y e0 bga 3 C55c to 125c lt m 4644ey-1#pbf sac305 (rohs) lt m 4644y-1 e1 bga 3 C40c to 125c lt m 4644iy-1#pbf sac305 (rohs) lt m 4644y-1 e1 bga 3 C40c to 125c lt m 4644iy-1 snpb (63/37) lt m 4644y-1 e0 bga 3 C40c to 125c note: the LTM4644-1 does not include the internal top feedback resistor. consult marketing for parts specified with wider operating temperature ranges. *device temperature grade is indicated by a label on the shipping container. pad or ball finish code is per ipc/jedec j-std-609. ? terminal finish part markings: www. linear.com/leadfree ? recommended lga and bga pcb assembly and manufacturing procedures: www . linear.com/umodule/pcbassembly ? package and t ray drawings: www. linear.com/packaging order information http://www .linear.com/product/ltm4644#orderinfo ltm4644/LTM4644-1 4644fe
3 for more information www.linear.com/ltm4644 electrical characteristics the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c (note 2). v in = 12v, per the typical application. symbol parameter conditions min typ max units switching regulator section: per channel v in , sv in input dc voltage sv in = v in l 4 14 v v out(range) output voltage range l 0.6 5.5 v v out(dc) output voltage, total variation with line and load c in = 22f, c out = 100f ceramic, mode = intv cc ,v in = 4 v to 14 v, i out = 0 a to 4a (note 4) ltm4644: r fb(bot) = 40.2k LTM4644-1: r fb(top) = 60.4k, r fb(bot) = 40.2k l 1.477 1.50 1.523 v v run run pin on threshold v run rising 1.1 1.2 1.3 v i q(svin) input supply bias current v in = 12v, v out = 1.5v, mode = intv cc v in = 12v, v out = 1.5v, mode = gnd shutdown, run = 0, v in = 12v 6 2 11 ma ma a i s(vin) input supply current v in = 12v, v out = 1.5v, i out = 4a 0.62 a i out(dc) output continuous current range v in = 12v, v out = 1.5v (note 4) 0 4 a v out (line)/v out line regulation accuracy v out = 1.5v, v in = 4v to 14v, i out = 0a l 0.04 0.15 %/v v out (load)/v out load regulation accuracy v out = 1.5v, i out = 0a to 4a l 0.5 1 % v out(ac) output ripple voltage i out = 0a, c out = 100f ceramic, v in = 12v, v out = 1.5v 5 mv v out(start) turn-on overshoot i out = 0a, c out = 100f ceramic, v in = 12v, v out = 1.5v 30 mv t start turn-on time c out = 100f ceramic, no load, track/ss = 0.01f, v in = 12v, v out = 1.5v 2.5 ms v outls peak deviation for dynamic load load: 0% to 50% to 0% of full load, c out = 47f ceramic, v in = 12v, v out = 1.5v 160 mv t settle settling time for dynamic load step load: 0% to 50% to 0% of full load, c out = 47f ceramic, v in = 12v, v out = 1.5v 40 s i outpk output current limit v in = 12v, v out = 1.5v 6 7 a v fb voltage at fb pin i out = 0a, v out = 1.5v, 0c to 125c i out = 0a, v out = 1.5v, C40c to 125c l 0.594 0.592 0.60 0.60 0.606 0.608 v v i fb current at fb pin (note 3) 30 na r fbhi resistor between v out and fb pins ltm4644 only 60.05 60.40 60.75 k i track/ss track pin soft-start pull-up current track/ss = 0v 2.5 4 a v in(uvlo) v in undervoltage lockout v in falling v in hysteresis 2.4 2.6 350 2.8 v mv t on(min) minimum on-time (note 3) 40 ns t off(min) minimum off-time (note 3) 70 ns v pgood pgood trip level v fb with respect to set output v fb ramping negative v fb ramping positive C13 7 C10 10 C7 13 % % i pgood pgood leakage 2 a v pgl pgood voltage low i pgood = 1ma 0.02 0.1 v v intvcc internal v cc voltage sv in = 4v to 14v 3.2 3.3 3.4 v v intvcc load reg intv cc load regulation i cc = 0ma to 20ma 0.5 % f osc oscillator frequency 1 mhz clkin clkin threshold 0.7 v ltm4644/LTM4644-1 4644fe
4 for more information www.linear.com/ltm4644 1.0v output transient response 1.5v output transient response 2.5v output transient response efficiency vs load current from 5v in (one channel operating) efficiency vs load current from 12v in (one channel operating) dcm mode efficiency from 1.5v out electrical characteristics note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: the ltm4644e/ltm4644e-1 is tested under pulsed load conditions such that t j t a . the ltm4644e/LTM4644-1 is guaranteed to meet performance specifications over the 0c to 125c internal operating temperature range. specifications over the full C40c to 125c internal operating temperature range are assured by design, characterization and correlation with statistical process controls. the ltm4644i/ltm4644i-1 is guaranteed to meet specifications over the full C40c to 125c internal operating temperature range. the ltm4644mp/ltm4644mp-1 is tested and guaranteed over full C55c to 125c internal operating temperature range. note that the maximum ambient temperature consistent with these specifications is determined by specific operating conditions in conjunction with board layout, the rated package thermal resistance and other environmental factors. note 3: 100% tested at wafer level. note 4: see output current derating curves for different v in , v out and t a . note 5: this ic includes overtemperature protection that is intended to protect the device during momentary overload conditions. junction temperature will exceed 125c when overtemperature protection is active. continuous operation above the specified maximum operating junction temperature may impair device reliability. typical performance characteristics load current (a) 0 70 efficiency (%) 75 85 90 95 100 1 4644 g01 80 4 2 3 3.3v out 2.5v out 1.8v out 1.5v out 1.2v out load current (a) 0 65 efficiency (%) 70 80 85 90 95 1 4644 g02 75 4 2 3 5v out 3.3v out 2.5v out 1.8v out 1.5v out 1.2v out load current (a) 0.001 0 efficiency (%) 20 30 40 100 0.01 4644 g03 10 50 60 70 80 90 10 0.1 1 5v in 12v in 20s/div load step 1a/div 4644 g04 v out 50mv/div ac-coupled v in = 12v, v out = 1v, i out = 3a to 4a, 1a/s c ff = 10pf output capacitor = 1 ? 47f ceramic (per channel) 20s/div load step 1a/div 4644 g05 v out 50mv/div ac-coupled v in = 12v, v out = 1.5v, i out = 3a to 4a, 1a/s c ff = 10pf output capacitor = 1 ? 47f ceramic 20s/div load step 1a/div 4644 g06 v out 50mv/div ac-coupled v in = 12v, v out = 2.5v, i out = 3a to 4a, 1a/s c ff = 10pf output capacitor = 1 ? 47f ceramic ltm4644/LTM4644-1 4644fe
5 for more information www.linear.com/ltm4644 typical performance characteristics 3.3v output transient response 5v output transient response start-up with no load start-up with 4a load short-circuit with no load short-circuit with 4a load 20s/div load step 1a/div 4644 g08 v out 50mv/div ac-coupled v in = 12v, v out = 5v, i out = 3a to 4a, 1a/s output capacitor = 47f ceramic 5ms/div 4644 g09 i in 0.1a/div v out 0.5v/div v in = 12v, v out = 1.5v input capacitor = 150f sanyo electrolytic capacitor (optional) + 22f ceramic capacitor output capacitor = 47f ceramic capacitor soft-start capacitor = 0.1f 5ms/div 4644 g10 i in 0.2a/div v out 0.5v/div v in = 12v, v out = 1.5v input capacitor = 150f sanyo electrolytic capacitor (optional) + 22f ceramic capacitor output capacitor = 47f ceramic capacitor soft-start capacitor = 0.1f 20s/div 4644 g11 i in 0.5a/div v out 0.5v/div v in = 12v, v out = 1.5v input capacitor = 150f sanyo electrolytic capacitor (optional) + 22f ceramic capacitor output capacitor = 47f ceramic capacitor 20s/div 4644 g12 i in 0.5a/div v out 0.5v/div v in = 12v, v out = 1.5v input capacitor = 150f sanyo electrolytic capacitor (optional) + 22f ceramic capacitor output capacitor = 47f ceramic capacitor 20s/div load step 1a/div 4644 g07 v out 50mv/div ac-coupled v in = 12v, v out = 3.3v, i out = 3a to 4a, 1a/s output capacitor = 47f ceramic recovery to no load from short-circuit output ripple start into pre-biased output i out 20a/div v out 200mv/div v in = 12v v out = 1v input capacitor = 22f sanyo electrolytic capacitor (optional) + 2 22f ceramic cap. output capacitor = 2 47f ceramic cap. soft-start capacitor = 0.1f 5s/div 4644 g13 5mv/div ac-coupled v in = 12v v out = 1.5v input capacitor = 22f sanyo electrolytic capacitor (optional) + 2 22f ceramic cap. output capacitor = 2 47f ceramic cap. soft-start capacitor = 0.1f 20mhz measurement bandwidth 500s/div 4644 g14 v in 2v/div v out 1v/div v in = 12v v out = 5v input capacitor = 22f sanyo electrolytic capacitor (optional) + 2 22f ceramic cap. output capacitor = 2 47f ceramic cap. soft-start capacitor = 0.1f 1s/div 4644 g15 ltm4644/LTM4644-1 4644fe
6 for more information www.linear.com/ltm4644 pin functions v out1 ( a1, a2, a3), v out2 ( c1, d1, d2), v out3 (f1, g1, g2), v out4 ( j1, k1, k2): power output pins of each switching mode regulator channel. apply output load between these pins and gnd pins. recommend placing output decoupling capacitance directly between these pins and gnd pins. see the applications information section for paralleling outputs. gnd ( a4-a5, b1-b2, c5, d3-d5, e1-e2, f5, g3-g5, h1-h2, j5, k3-k4, l1-l2): power ground pins for both input and output returns. use large pcb copper areas to connect all gnd together. v in1 ( b3, b4), v in2 ( e3, e4), v in3 ( h3, h4), v in4 ( l3, l4): power input pins connect to the drain of the internal top mosfet for each switching mode regulator channel. apply input voltages between these pins and gnd pins. recommend placing input decoupling capacitance directly between each of v in pins and gnd pins. pgood1, pgood2, pgood3, pgood 4 ( c3, c2, f2, j2): output power good with open-drain logic of each switching mode regulator channel. pgood is pulled to ground when the voltage on the fb pin is not within 10% of the internal 0.6v reference. clkout (j3): output clock signal for polyphase ? opera- tion of the module. the phase of clkout with respect to clkin is set to 180. clkouts peak-to-peak amplitude is intv cc to gnd. see the application information section for details. strictly output; do not drive this pin. intv cc1 , intv cc2 , intv cc3 , intv cc4 ( c4, f4, j4, k5): internal 3.3 v regulator output of each switching mode regulator channel. the internal power drivers and con - trol circuits are powered from this voltage. each pin is internally decoupled to gnd with 1 f low esr ceramic capacitor already. sv in1 , sv in2 , sv in , sv in4 ( b5, e5, h5, l5): signal v in . filtered input voltage to the internal 3.3 v regulator for the control circuitry of each switching mode regulator channel. tie this pin to the v in pin respectively in most applications. connect sv in to an external voltage supply of at least 4v which must also be greater than v out . track/ss1, track/ss2, track/ss3, track/ss 4 (a6, d6, g6, k6): output tracking and soft-start pin of each switching mode regulator channel. allows the user to control the rise time of the output voltage. putting a volt- age below 0.6 v on this pin bypasses the internal reference input to the error amplifier, instead it servos the fb pin to match the track voltage. above 0.6 v, the tracking function stops and the internal reference resumes control of the error amplifier. theres an internal 2.5 a pull-up current from intv cc on this pin, so putting a capacitor here provides soft-start function. mode1, mode2, mode3, mode 4 ( b6, e6, h6, l6): operation mode select for each switching mode regula - tor channel . ti e this pin to intv cc to force continuous synchronous operation at all output loads. tying it to sgnd enables discontinuous current mode operation at light loads. do not leave floating. run1, run2, run3, run 4 ( c6, f6, j6, k7): run control input of each switching mode regulator channel. enable regulator operation by tying the specific run pin above 1.2v. pulling it below 1.1 v shuts down the respective regulator channel. do not leave floating. fb1, fb2, fb3, fb 4 ( a7, d7, g7, j7): the negative input of the error amplifier for each switching mode regulator channel. internally, in ltm4644, this pin is connected to v out of each channel with a 60.4 k precision resistor. different output voltages can be programmed with an additional resistor between the fb and gnd pins for the ltm4644, and two resistors between the v out , fb and gnd pins for the LTM4644-1. in polyphase operation, tying the fb pins together allows for parallel operation. see the applications information section for details. package row and column labeling m ay vary among module products. review each package layout carefully. ltm4644/LTM4644-1 4644fe
7 for more information www.linear.com/ltm4644 pin functions comp1, comp2, comp3, comp 4 ( b7, e7, h7, l7): cur- rent control threshold and error amplifier compensation point of each switching mode regulator channel. the internal current comparator threshold is proportional to this voltage. tie the comp pins together for parallel opera - tion. the device is internally compensated. clkin ( c7): external synchronization input to phase detector of the module. this pin is internally terminated to sgnd with 20 k. the phase-locked loop will force the channel 1 turn-on signal to be synchronized with the rising edge of the clkin signal. channel 2, channel 3 and channel 4 will also be synchronized with the rising edge of the clkin signal with a pre-determined phase shift. see the applications information section for details. sgnd ( f 7): signal ground connection. sgnd is connected to gnd internally through single point. use a separated sgnd ground copper area for the ground of the feedback resistor and other components connected to signal pins. a second connection between the pgnd plane and sgnd plane is recommended on the backside of the pcb under - neath the module. temp ( f3): onboard temperature diode for monitoring the vbe junction voltage change with temperature. see the applications information section. ltm4644/LTM4644-1 4644fe
8 for more information www.linear.com/ltm4644 block diagram 4644 bd power control clkout fb1 clkin mode1 track/ss1 run1 comp1 intv cc1 internal filter internal comp v out1 1f 0.22f 1h 100k 100k 100k 100k 10f 47f freq1 162k 60.4k (*ltm4644 only) 60.4k (*ltm4644 only) 60.4k (*ltm4644 only) 60.4k (*ltm4644 only) 60.4k 0.1f v in 4v to 14v v out1 1.2v 4a intv cc1 pgood1 sv in1 v in1 v out1 gnd sgnd gnd power control fb2 mode2 track/ss2 run2 comp2 intv cc2 internal filter internal comp v out2 1f 0.22f 1h 10f 47f freq2 162k 40.2k 0.1f v in v out2 1.5v 4a intv cc2 pgood2 sv in2 v in2 v out2 gnd power control fb3 mode3 track/ss3 run3 comp3 intv cc3 internal filter internal comp v out3 1f 0.22f 1h 10f 47f freq3 162k 30.1k 0.1f v in v out3 1.8v 4a intv cc3 pgood3 sv in3 v in3 v out3 gnd power control fb4 mode4 track/ss4 run4 comp4 intv cc4 internal filter internal comp v out4 1f 0.22f 1h 10f 47f 1f freq4 162k 90.9k 0.1f v in v out4 1v 4a intv cc4 pgood4 sv in4 v in4 v out4 gnd temp clkout *LTM4644-1 does not include 60.4k resistor clkout clkin clkout clkin clkout clkin 1f 1f 1f ltm4644/LTM4644-1 4644fe
9 for more information www.linear.com/ltm4644 symbol parameter conditions min typ max units c in external input capacitor requirement (v in = 4v to 14v, v out = 1.5v) i out = 4a 4.7 10 f c out external output capacitor requirement (v in = 4v to 14v, v out = 1.5v) i out = 4a 22 47 f decoupling requirements operation the ltm4644 is a quad output standalone non-isolated switch mode dc/dc power supply. it has four separate regulator channels with each of them capable of delivering up to 4 a continuous output current with few external input and output capacitors. each regulator provides precisely regulated output voltage programmable from 0.6 v to 5.5 v via a single external resistor ( two resistors for LTM4644-1) over 4 v to 14 v input voltage range. with an external bias voltage, this module can operate from an input voltage as low as 2.375 v. the typical application schematic is shown in figure 33. the ltm4644 integrates four separate constant frequency controlled on-time valley current mode regulators, power mosfets, inductors, and other supporting discrete com - ponents. the typical switching frequency is set to 1mhz. for switching noise-sensitive applications, the module regulator can be externally synchronized to a clock from 700khz to 1.3 mhz. see the applications information section. with current mode control and internal feedback loop compensation, the ltm4644 module has sufficient stabil - ity margins and good transient performance with a wide range of output capacitors, even with all ceramic output capacitors. current mode control provides the flexibility of paralleling any of the separate regulator channels with accurate cur- rent sharing. with a built-in clock interleaving between each two regulator channels, the ltm4644 could easily employ a 2+2, 3+1 or 4 channels parallel operation which is more than flexible in a multirail pol application like fpga. furthermore, the ltm4644 has clkin and clk - out pins for frequency synchronization or polyphasing multiple devices which allow up to 8 phases cascaded to run simultaneously. current mode control also provides cycle-by-cycle fast current monitoring. foldback current limiting is provided in an overcurrent condition to reduce the inductor valley current to approximately 40% of the original value when v fb drops. an internal overvoltage and undervoltage comparators pull the open-drain pgood output low if the output feedback voltage exits a 10% window around the regulation point. continuous conduction mode (ccm) operation is forced during ov and uv conditions except during start-up when the track pin is ramping up to 0.6v. pulling the run pin below 1.1 v forces the controller into its shutdown state, turning off both power mosfets and most of the internal control circuitry. at light load cur - rents, discontinuous conduction mode ( dcm) operation can be enabled to achieve higher efficiency compared to continuous conduction mode ( ccm) by setting the mode pin to sgnd. the track/ss pin is used for power supply tracking and soft-start programming. see the applications information section. a temperature diode is included inside the module to moni - tor the temperature of the module. see the applications information section for details. (per channel) ltm4644/LTM4644-1 4644fe
10 for more information www.linear.com/ltm4644 applications information the typical ltm4644 application circuit is shown in figure 33. external component selection is primarily determined by the input voltage, the output voltage and the maximum load current. refer to table 7 for specific external capacitor requirements for a particular application. v in to v out step-down ratios there are restrictions in the maximum v in and v out step- down ratio that can be achieved for a given input voltage due to the minimum off-time and minimum on-time limits of each regulator. the minimum off-time limit imposes a maximum duty cycle which can be calculated as: d max = 1 C t off(min) ? f sw where t off(min) is the minimum off-time , 70 ns typical for ltm4644, and f sw is the switching frequency. conversely the minimum on-time limit imposes a minimum duty cycle of the converter which can be calculated as: d min = t on(min) ? f sw where t on(min) is the minimum on-time , 40 ns typical for ltm4644. in the rare cases where the minimum duty cycle is surpassed, the output voltage will still remain in regulation, but the switching frequency will decrease from its programmed value. note that additional thermal derating may be applied . see the thermal considerations and output current derating section in this data sheet. output v oltage programming (ltm4644) the pwm controller has an internal 0.6 v reference voltage. as shown in the block diagram, a 60.4 k internal feedback resistor connects each regulator channel from v out pin to fb pin. adding a resistor r fb(bot) from fb pin to gnd programs the output voltage: r fb(bot) = 60.4k v out 0.6 ? 1 table 1. v fb resistor table vs various output voltages v out (v) 0.6 1.0 1.2 1.5 1.8 2.5 3.3 5.0 r fb(bot) ( k) open 90.9 60.4 40.2 30.1 19.1 13.3 8.25 for parallel operation of n channels, use the following equation can be used to solve for r fb(bot) . tie the v out and the fb and comp pins together for each paralleled output with a single resistor to gnd as determined by: r fb(bot) = 60.4k n ? ? ? ? ? ? v out 0.6 ? 1 ? ? ? ? ? ? output voltage programming (LTM4644-1) the pwm controller has an internal 0.6 v reference voltage. adding two resistors r fb(top) from v out to fb pin and r fb(bot) from fb pin to gnd programs the output voltage: r fb(bot) = r fb(top) v out 0.6 ? 1 for parallel operation of n channels, only one set of r fb(top) and r fb(bot) is needed while tying the v out , fb and comp pins from different channels together. see figure 1 for example. figure 1. LTM4644-1 feedback resistor for paralleling application 4644 f01 LTM4644-1 comp3 r fb(top) r fb(bot) v out1 fb1 comp1 v out2 fb2 comp2 v out3 fb3 ltm4644 LTM4644-1 top feedback resistor from v out -to-v fb (one resistor per channel) integrated 60.4k 0.5% resistor external (to be added on pcb) application general applications to inter face with pmbus power system management supervisory ics such as the ltc2975 ltm4644/LTM4644-1 4644fe
11 for more information www.linear.com/ltm4644 applications information input decoupling capacitors the ltm4644 module should be connected to a low ac- impedance dc source. for each regulator channel, a 10f input ceramic capacitor is recommended for rms ripple current decoupling. a bulk input capacitor is only needed when the input source impedance is compromised by long inductive leads, traces or not enough source capacitance. the bulk capacitor can be an electrolytic aluminum capaci - tor or polymer capacitor. without considering the inductor ripple current, the rms current of the input capacitor can be estimated as: i cin(rms) = i out(max) % ? d ? (1 ? d) where % is the estimated efficiency of the power module. output decoupling capacitors with an optimized high frequency, high bandwidth design, only single piece of low esr output ceramic capacitor is required for each regulator channel to achieve low output voltage ripple and very good transient response. additional output filtering may be required by the system designer, if further reduction of output ripples or dynamic transient spikes is required. table 7 shows a matrix of different output voltages and output capacitors to minimize the voltage droop and overshoot during a 2 a load step tran - sient. multiphase operation will reduce effective output ripple as a function of the number of phases. application note 77 discusses this noise reduction versus output ripple current cancellation, but the output capacitance will be more a function of stability and transient response. the ltpowercad? design tool is available to download online for output ripple, stability and transient response analysis and calculating the output ripple reduction as the number of phases implemented increases by n times. discontinuous conduction mode (dcm) in applications where low output ripple and high efficiency at intermediate current are desired, discontinuous con - duction mode ( dcm) should be used by connecting the mode pin to sgnd. at light loads the internal current comparator may remain tripped for several cycles and force the top mosfet to stay off for several cycles, thus skipping cycles. the inductor current does not reverse in this mode. force continuous conduction mode (ccm) in applications where fixed frequency operation is more critical than low current efficiency, and where the lowest output ripple is desired, forced continuous conduction mode operation should be used. forced continuous opera - tion can be enabled by tying the mode pin to intv cc . in this mode, inductor current is allowed to reverse during low output loads, the comp voltage is in control of the current comparator threshold throughout, and the top mosfet always turns on with each oscillator pulse. during start-up, forced continuous mode is disabled and inductor current is prevented from reversing until the ltm4644s output voltage is in regulation. operating frequency the operating frequency of the ltm4644 is optimized to achieve the compact package size and the minimum output ripple voltage while still keeping high efficiency. the default operating frequency is internally set to 1 mhz. in most ap - plications, no additional frequency adjusting is required. if any operating frequency other than 1 mhz is required by application, the module regulator can be externally synchronized to a clock from 700khz to 1.3mhz. frequency synchronization and clock in the power module has a phase-locked loop comprised of an internal voltage controlled oscillator and a phase detector. this allows all internal top mosfet turn-on to be locked to the rising edge of the same external clock. the external clock frequency range must be within 30% around the 1 mhz set frequency. a pulse detection circuit is used to detect a clock on the clkin pin to turn on the phase-locked loop. the pulse width of the clock has to be at least 400 ns. the clock high level must be above 2v and clock low level below 0.3 v. during the start-up of the regulator, the phase-locked loop function is disabled. ltm4644/LTM4644-1 4644fe
12 for more information www.linear.com/ltm4644 applications information multichannel parallel operation for loads that demand more than 4 a of output current, the ltm4644 multiple regulator channels can be easily paralleled to provide more output current without increas - ing input and output voltage ripples. the ltm4644 has preset built-in phase shift between each two of the four regulator channels which is suitable to employ a 2+2, 3+1 or 4 channels parallel operation. table 2 gives the phase difference between regulator channels. table 2. phase difference between regulator channels channel ch1 ch2 ch3 ch4 phase difference 180 90 180 figure 2 shows a 2+2 and a 4- channels parallel concept schematic for clock phasing. figure 2. 2+2 and 4 channels parallel concept schematic 4644 f02 fb1 track/ss1 comp1 run1 v out1 ch1 (0) fb2 track/ss2 comp2 run2 v out2 ltm4644 8a 8a ch2 (180) 180 fb3 track/ss3 comp3 run3 v out3 ch3 (0) fb4 track/ss4 comp4 run4 v out4 ch4 (180) 180 fb1 track/ss1 comp1 run1 v out1 ch1 (0) fb2 track/ss2 comp2 run2 v out2 ltm4644 16a ch2 (180) 180 fb3 track/ss3 comp3 run3 v out3 ch3 (270) fb4 track/ss4 comp4 run4 v out4 ch4 (90) 180 90 a multiphase power supply significantly reduces the amount of ripple current in both the input and output ca- pacitors. the rms input ripple current is reduced by, and the effective ripple frequency is multiplied by, the number of phases used ( assuming that the input voltage is greater than the number of phases used times the output voltage). the output ripple amplitude is also reduced by the number of phases used when all of the outputs are tied together to achieve a single high output current design. the ltm4644 device is an inherently current mode con- trolled device, so parallel modules will have very good current sharing. this will balance the thermals on the design. please tie the run, track/ss, fb and comp pins of each paralleling channel together. figure 35 and figure 36 shows an example of parallel operation and pin connection. input rms ripple current cancellation application note 77 provides a detailed explanation of multiphase operation. the input rms ripple current can - cellation mathematical derivations are presented, and a graph is displayed representing the rms ripple current reduction as a function of the number of interleaved phases. figure 3 shows this graph. soft-start and output v oltage tracking the track/ss pin provides a means to either soft-start of each regulator channel or track it to a different power supply. a capacitor on the track/ss pin will program the ramp rate of the output voltage. an internal 2.5 a current source will charge up the external soft-start capacitor towards the intv cc voltage. when the track/ss voltage is below 0.6 v, it will take over the internal 0.6 v reference voltage to control the output voltage. the total soft-start time can be calculated as: t ss = 0.6 ? c ss 2.5a where c ss is the capacitance on the track/ss pin. cur- rent foldback and forced continuous mode are disabled during the soft-start process. ltm4644/LTM4644-1 4644fe
13 for more information www.linear.com/ltm4644 applications information figure 3. normalized rms ripple current for single phase or polyphase applications duty cycle (v out /v in ) 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.6 0.65 0.7 0.75 0.8 0.85 0.9 0.60 0.55 0.50 0.45 0.40 0.35 0.30 0.25 0.20 0.15 0.10 0.05 0 4644 f03 rms input ripple current dc load current 1-phase 2-phase 4-phase output voltage tracking can also be programmed externally using the track/ss pin of each regulator channel. the output can be tracked up and down with another regula - tor. figure 4 and figure 5 show an example waveform and schematic of a ratiometric tracking where the slave regulators (v out2 , v out3 and v out4 ) output slew rate is proportional to the masters (v out1 ). since the slave regulators track/ss is connected to the masters output through a r tr(top) /r tr(bot) resistor divider and its voltage used to regulate the slave output voltage when track/ss voltage is below 0.6 v, the slave output voltage and the master output voltage should satisfy the following equation during the start-up. v out(sl) ? r fb(sl) r fb(sl) + 60.4k = v out(ma) ? r tr(bot) r tr(top) + r tr(bot) where the 60.4 k is the integrated top feedback resistor and the r fb(sl) is the external bottom feedback resistor of the ltm4644. the r tr(top) /r tr(bot) is the resistor divider on the track/ss pin of the slave regulator, as shown in figure 5. following the upper equation, the masters output slew rate ( mr) and the slaves output slew rate ( sr) in volts/ time is determined by: mr sr = r fb(sl) r fb(sl) + 60.4k r tr(bot) r tr(top) + r tr(bot) ltm4644/LTM4644-1 4644fe
14 for more information www.linear.com/ltm4644 applications information 4644 f05 v in1 sv in1 run1 intv cc1 mode1 v out1 fb1 comp1 track/ss1 pgood1 ch1 c ss 0.1f r fb1 13.3k v in 4v to 14v r tr(top)2 60.4k 3.3v/4a 2.5v/4a 1.8v/4a 1.2v/4a v in2 sv in2 run2 intv cc2 mode2 v out2 fb2 comp2 track/ss2 pgood2 ch2 r fb(sl)2 19.1k v in3 sv in3 run3 intv cc3 mode3 v out3 fb3 comp3 track/ss3 pgood3 ch3 r fb(sl)3 30.1k v in4 sv in4 run4 intv cc4 mode4 v out4 fb4 comp4 track/ss4 pgood4 ch4 ltm4644 r fb(sl)4 60.4k r tr(bot)2 13.3k r tr(top)3 60.4k r tr(bot)3 13.3k r tr(top)4 60.4k r tr(bot)4 13.3k 60.4k 60.4k 60.4k 60.4k 4644 f04 time output voltage v out4 = 1.2v v out3 = 1.8v v out2 = 2.5v v out1 = 3.3v figure 4. output ratiometric tracking waveform figure 5. output ratiometric tracking schematic for example, v out( ma) = 3.3v , mr = 3.3v /24ms and v out( sl) = 1.2 v, sr = 1.2 v/24ms as v out1 and v out4 shown in figure 5. from the equation, we could solve out that r tr4(top) = 60.4 k and r tr4(bot) = 13.3 k is a good com- bination. follow the same equation, we can get the same r tr(top) /r tr(bot) resistor divider value for v out2 and v out3 . the track pins will have the 2.5 a current source on when a resistive divider is used to implement tracking on that specific channel. this will impose an offset on the track pin input. smaller value resistors with the same ratios as the resistor values calculated from the above equation can be used. for example, where the 60.4 k is used then a 6.04 k can be used to reduce the track pin offset to a negligible value. the coincident output tracking can be recognized as a special ratiometric output tracking which the masters output slew rate ( mr) is the same as the slaves output slew rate (sr), as waveform shown in figure 6. from the equation we could easily find out that, in the coincident tracking, the slave regulators track/ss pin resistor divider is always the same as its output voltage divider. r fb(sl) r fb(sl) + 60.4k = r tr(bot) r tr(top) + r tr(bot) ltm4644/LTM4644-1 4644fe
15 for more information www.linear.com/ltm4644 applications information for example, r tr4(top) = 60.4 k and r tr4(bot) = 60.4 k is a good combination for coincident tracking for v out(ma) = 3.3v and v out(sl) = 1.2v application. reference only, while still keeping the power mosfets off. further increasing the run pin voltage above 1.2v will turn on the entire regulator channel. pre-biased output start-up there may be situations that require the power supply to start up with some charge on the output capacitors. the ltm4644 can safely power up into a pre-biased output without discharging it. the ltm4644 accomplishes this by forcing discontinuous mode ( dcm) operation until the track/ss pin voltage reaches 0.6 v reference voltage. this will prevent the bg from turning on during the pre-biased output start-up which would discharge the output. do not pre-bias ltm4644 with an output voltage higher than intv cc (3.3v). overtemperature protection the internal overtemperature protection monitors the junc - tion temperature of th e module. if the junction temperature reaches approximately 160 c, both power switches will be turned off until the temperature drops about 15 c cooler. low input application the ltm4644 module has a separate sv in pin for each regulator channel which makes it compatible with opera- tion from an input voltage as low as 2.375 v. the sv in pin is the signal input of the regulator control circuitry while the v in pin is the power input which directly connected to the drain of the top mosfet. in most application with input voltage ranges from 4 v to 14 v, connect the sv in pin directly to the v in pin of each regulator channel. an optional filter, consisting of a resistor (1 to 10 ) be- tween sv in and v in ground, can be placed for additional noise immunity. this filter is not necessary in most cases if good pcb layout practices are followed ( see figure 32). in a low input voltage (2.375 v to 4 v) application, or to reduce power dissipation by the internal bias ldo, connect sv in to an external voltage higher than 4 v with a 0.1f local bypass capacitor. figure 34 shows an example of a low input voltage application. please note, sv in voltage cannot go below v out voltage. figure 6. output coincident tracking waveform 4644 f06 time output voltage v out4 = 1.2v v out3 = 1.8v v out2 = 2.5v v out1 = 3.3v power good the pgood pins are open drain pins that can be used to monitor each valid output voltage regulation. this pin monitors a 10% window around the regulation point. a resistor can be pulled up to a particular supply voltage for monitoring. to prevent unwanted pgood glitches dur - ing transients or dynamic v out changes, the ltm4644s pgood falling edge includes a blanking delay of approxi- mately 52 switching cycles. stability compensation the ltm4644 module internal compensation loop of each regulator channel is designed and optimized for low esr ceramic output capacitors only application. table 6 is provided for most application requirements. in case of bulk output capacitors is required for output ripples or dynamic transient spike reduction, an additional 10 pf to 15pf phase boost capacitor is required between the v out and fb pins. the ltpowercad design tool is available to download for control loop optimization. run enable pulling the run pin of each regulator channel to ground forces the regulator into its shutdown state, turning off both power mosfets and most of its internal control circuitry. bringing the run pin above 0.7 v turns on the internal ltm4644/LTM4644-1 4644fe
16 for more information www.linear.com/ltm4644 applications information temperature monitoring a diode connected pnp transistor is used for the temp monitor function by monitoring its voltage over tempera - ture. the temperature dependence of this diode voltage can be understood in the equation: v d = nv t ln i d i s ? ? ? ? ? ? where v t is the thermal voltage ( kt/q), and n, the ideality factor, is 1 for the diode connected pnp transistor be- ing used in the ltm4644. i s is expressed by the typical empirical equation: i s = i 0 exp ?v g0 v t ? ? ? ? ? ? where i 0 is a process and geometry dependent current , (i 0 is typically around 20 k orders of magnitude larger than i s at room temperature) and v g0 is the band gap voltage of 1.2v extrapolated to absolute zero or C273c. if we take the i s equation and substitute into the v d equa- tion, then we get: v d = v g0 ? kt q ? ? ? ? ? ? ln i 0 i d ? ? ? ? ? ? , v t = kt q the expression shows that the diode voltage decreases (linearly if i 0 were constant) with increasing temperature and constant diode current. figure 6 shows a plot of v d vs temperature over the operating temperature range of the ltm4644. if we take this equation and differentiate it with respect to temperature t, then: dv d dt = ? v g0 ? v d t this dv d /dt term is the temperature coefficient equal to about C2 mv/k or C2 mv/c. the equation is simplified for the first order derivation. solving for t, t = C(v g0 C v d )/(dv d /dt) provides the temperature. 1 st example: figure 7 for 27 c , or 300 k the diode voltage is 0.598 v, thus, 300k = C(1200mv C 598mv)/ C2.0 mv/k) 2 nd example: figure 7 for 75 c, or 350 k the diode voltage is 0.50 v, thus, 350k = C(1200mv C 500mv)/ C2.0mv/k) converting the kelvin scale to celsius is simply taking the kelvin temp and subtracting 273 from it. a typical forward voltage is given in the electrical charac - teristics section of the data sheet, and figure 7 is the plot of this forward voltage. measure this forward voltage at 27c to establish a reference point. then using the above expression while measuring the forward voltage over temperature will provide a general temperature monitor. connect a resistor between temp and v in to set the cur- rent to 100a. see figure 35 for an example. figure 7. diode voltage v d vs temperature t(c) temperature (c) ?50 ?25 0.3 diode voltage (v) 0.5 0.8 0 50 75 0.4 0.7 0.6 25 100 4637 f07 125 i d = 100a thermal considerations and output current derating the thermal resistances reported in the pin configura- tion section of the data sheet are consistent with those parameters defined by jesd 51-12 and are intended for use with finite element analysis ( fea) software modeling tools that leverage the outcome of thermal modeling, simulation, and correlation to hardware evaluation per- formed on a module package mounted to a hardware test board: defined by jesd 51-9 ( test boards for area ltm4644/LTM4644-1 4644fe
17 for more information www.linear.com/ltm4644 applications information array surface mount package thermal measurements). the motivation for providing these thermal coefficients in found in jesd 51-12 ( guidelines for reporting and using electronic package thermal information). many designers may opt to use laboratory equipment and a test vehicle such as the demo board to predict the module regulators thermal performance in their appli - cation at various electrical and environmental operating conditions to compliment any fea activities. without fea software, the thermal resistances reported in the pin con - figuration section are in-and-of themselves not relevant to providing guidance of thermal performance; instead, the derating curves provided in this data sheet can be used in a manner that yields insight and guidance pertaining to ones application-usage, and can be adapted to correlate thermal performance to ones own application. the pin configuration section typically gives four thermal coefficients explicitly defined in jesd 51-12; these coef - ficients are quoted or paraphrased below: 1. ja , the thermal resistance from junction to ambient, is the natural convection junction-to-ambient air thermal resistance measured in a one cubic foot sealed enclo - sure. this environment is sometimes referred to as still air although natural convection causes the air to move . this value is determined with the part mounted to a jesd 51-9 defined test board, which does not reflect an actual application or viable operating condition. 2. jcbottom , the thermal resistance from junction to the bottom of the product case, is determined with all of the component power dissipation flowing through the bottom of the page. in the typical module regulator, the bulk of the heat flows out the bottom of the pack - age, but there is always heat flow out into the ambient environment. as a result, this thermal resistance value may be useful for comparing packages but the test conditions dont generally match the users application. 3. jctop , the thermal resistance from junction to top of the product case, is determined with nearly all of the component power dissipation flowing through the top of the package. as the electrical connections of the typical module regulator are on the bottom of the package, it is rare for an application to operate such that most of the heat flows from the junction to the top of the part. as in the case of jcbottom , this value may be useful for comparing packages but the test conditions dont generally match the users application. 4. jb , the thermal resistance from junction to the printed circuit board, is the junction- to- board thermal resistance where almost all of the heat flows through the bottom of the module regulator and into the board, and is really the sum of the jcbottom and the thermal resistance of the bottom of the part through the solder joints and through a portion of the board. the board temperature is measured a specified distance from the package. a graphical representation of the aforementioned ther - mal resistances is given in figure 8; blue resistances are contained within the module regulator, whereas green resistances are external to the module package. as a practical matter, it should be clear to the reader that no individual or sub-group of the four thermal resistance parameters defined by jesd 51-12 or provided in the pin configuration section replicates or conveys normal operating conditions of a module regulator. for example, in normal board-mounted applications, never does 100% of the devices total power loss (heat) thermally conduct exclusively through the top or exclusively through bot - tom of the module packageas the standard defines for jctop and jcbottom , respectively. in practice, power loss is thermally dissipated in both directions away from the packagegranted, in the absence of a heat sink and airflow, a majority of the heat flow is into the board. within the ltm4644, be aware there are multiple power devices and components dissipating power, with a con - sequence that the thermal resistances relative to different junctions of components or die are not exactly linear with respect to total package power loss. to reconcile this complication without sacrificing modeling simplicity but also, not ignoring practical realitiesan approach has been taken using fea software modeling along with laboratory testing in a controlled-environment chamber to reasonably define and correlate the thermal resistance values supplied in this data sheet: (1) initially, fea software ltm4644/LTM4644-1 4644fe
18 for more information www.linear.com/ltm4644 figure 8. graphical representation of jesd 51-12 thermal coefficients 4644 f08 module device junction-to-case (top) resistance junction-to-board resistance junction-to-ambient thermal resistance components case (top)-to-ambient resistance board-to-ambient resistance junction-to-case (bottom) resistance junction ambient case (bottom)-to-board resistance is used to accurately build the mechanical geometry of the ltm4644 and the specified pcb with all of the cor- rect material coefficients along with accurate power loss sour ce definitions ; (2) this model simulates a software- defined jedec environment consistent with jesd 51-12 to predict power loss heat flow and temperature readings at different interfaces that enable the calculation of the jedec-defined thermal resistance values ; (3) the model and fea software is used to evaluate the ltm4644 with heat sink and airflow ; (4) having solved for and analyzed these thermal resistance values and simulated various operating conditions in the software model, a thorough laboratory evaluation replicates the simulated conditions with thermocouples within a controlled- environment chamber while operating the device at the same power loss as that which was simulated. an outcome of this process and due diligence yields the set of derating curves shown in this data sheet. the 1 v to 5 v power loss curves in figures 9 to 15 can be used in coordination with the load current derating curves in figures 16 to 29 for calculating an approximate ja thermal resistance for the ltm4644 with various heat sinking and airflow conditions. the power loss curves are taken at room temperature, and are increased with a multiplicative factor according to the junction temperature. this approximate factor is 1.35 for 120 c. the derating curves are plotted with the output current starting at 16a and the ambient temperature at 30 c. these are chosen to include the lower and higher output voltage ranges applications information for correlating the thermal resistance. thermal models are derived from several temperature measurements in a controlled temperature chamber along with thermal mod - eling analysis. the junction temperatures are monitored while ambient temperature is increased with and without airflow. the power loss increase with ambient temperature change is factored into the derating curves. the junctions are maintained at 120 c maximum while lowering output current or power with increasing ambient temperature. the decreased output current will decrease the internal module loss as ambient temperature is increased. the monitored junction temperature of 120 c minus the ambient operat - ing temperature specifies how much module temperature rise can be allowed. as an example in figure 16 the load current is derated to 9.6 a at ~90 c with 400 lfm of airflow and no heat sink and the power loss for the 12 v to 1.0v at 9.5 a output is about 3.2 w. the 3.2 w loss is calculated with 4 times the 0.6 w room temperature loss from the 12v to 1.0 v power loss curve each channel at 2.4 a, and the 1.35 multiplying factor at 120 c junction. if the 90c ambient temperature is subtracted from the 120 c junc - tion temperature , then the difference of 30 c divided by 3.2w equals ~9.4c/w ja thermal resistance. table 3 specifies a 10 c/w value which is very close. tables 3 to 6 provide equivalent thermal resistances for the different outputs with and without airflow and heat sinking. the derived thermal resistances in tables 3 to 6 for the various conditions can be multiplied by the calculated power loss as a function of ambient temperature to derive temperature ltm4644/LTM4644-1 4644fe
19 for more information www.linear.com/ltm4644 rise above ambient, thus maximum junction temperature. room temperature power loss can be derived from the ef- ficiency cur ves in the typical performance characteristics section and adjusted with the above junction temperature multiplicative factor. the printed circuit board is a 1.6mm thick four layer board with two ounce copper for the two outer layers and one ounce copper for the two inner layers. the pcb dimensions are 95mm 76mm. the 16 a represents all four channels in parallel at 4 a each. the four parallel channels have their currents reduced at the same rate to develop an equivalent ja circuit evalu- ation with thermal couples or ir camera used to validate the thermal resistance values. maximum operating ambient t emperature figures 30 and 31 display the maximum power loss allowance curves vs ambient temperature with various heat sinking and airflow conditions . this data was derived from the thermal impedance generated by various ther - mal derating examinations with the junction temperature measured at 120 c. this maximum power loss limitation serves as a guideline when designing multiple output rails with different voltages and currents by calculating the total power loss. for example, to determine the maximum ambient tem - perature when v out1 = 2.5 v at 0.6 a, v out2 = 3.3 v at 3a, v out3 = 1.8 v at 1 a, v out4 = 1.2 v at 3 a, without a heat sink and 400 lfm airflow, simply add up the total power loss for each channel read from figure 9 to figure 15 which in this example equals 2.5 w, then multiply by the 1.35 coef - ficient for 120 c junction temperature and compare the total power loss number , 3.4 w with figure 30. figure 30 indicates with a 3.4 w total power loss, the maximum am - bient temperature for this particular application is around 86c. for reference, the actual thermal derating test in the chamber resulted in a maximum ambient temperature of 86.3 c, very close to the calculated value. also from figure 30, it is easy to determine with a 3.4 w total power loss, the maximum ambient temperature is around 77c with no airflow and 81c with 200lfm airflow. safety considerations the ltm4644 modules do not provide galvanic isolation from v in to v out . there is no internal fuse. if required, a slow blow fuse with a rating twice the maximum input current needs to be provided to protect each unit from catastrophic failure. the device does support thermal shutdown and overcurrent protection. applications information ltm4644/LTM4644-1 4644fe
20 for more information www.linear.com/ltm4644 figure 9. power loss at 1.0v output, (each channel, 25c) figure 10. power loss at 1.2v output, (each channel, 25c) figure 11. power loss at 1.5v output, (each channel, 25c) applications information figure 12. power loss at 1.8v output, (each channel, 25c) figure 13. power loss at 2.5v output, (each channel, 25c) figure 14.power loss at 3.3v output, (each channel, 25c) load current (a) 0 0.1 0 power loss (w) 0.6 1.5 1 4641 f09 0.3 0.2 0.5 0.4 0.7 1.2 0.9 0.8 1.1 1.4 1.3 1.0 4 2 3 0.5 3.5 1.5 2.5 12v in 5v in load current (a) 0 0.1 0 power loss (w) 0.6 1.5 1 4641 f10 0.3 0.2 0.5 0.4 0.7 1.2 0.9 0.8 1.1 1.4 1.3 1.0 4 2 3 0.5 3.5 1.5 2.5 12v in 5v in load current (a) 0 0.1 0 power loss (w) 0.6 1.5 1 4641 f11 0.3 0.2 0.5 0.4 0.7 1.2 0.9 0.8 1.1 1.4 1.3 1.0 4 2 3 0.5 3.5 1.5 2.5 12v in 5v in load current (a) 0 0.1 0 power loss (w) 0.6 1.5 1 4641 f12 0.3 0.2 0.5 0.4 0.7 1.2 0.9 0.8 1.1 1.4 1.3 1.0 4 2 3 0.5 3.5 1.5 2.5 12v in 5v in load current (a) 0 0 power loss (w) 0.6 1.6 1 4641 f13 0.2 0.4 1.2 0.8 1.4 1.0 4 2 3 0.5 3.5 1.5 2.5 12v in 5v in load current (a) 0 0 power loss (w) 0.6 1.8 1.6 1 4641 f14 0.2 0.4 1.2 0.8 1.4 1.0 4 2 3 0.5 3.5 1.5 2.5 12v in 5v in ltm4644/LTM4644-1 4644fe
21 for more information www.linear.com/ltm4644 applications information figure 18. 5v in to 1.0v out derating curve 4-channel paralleled, bga heat sink figure 19. 12v in to 1.0v out derating curve 4-channel paralleled, bga heat sink figure 20. 5v in to 1.5v out derating curve 4-channel paralleled, no heat sink ambient temperature (c) 30 0 current (a) 10 18 14 16 12 4641 f20 4 2 8 6 120 40 80 100 60 50 90 110 70 0lfm 200lfm 400lfm ambient temperature (c) 30 0 current (a) 10 18 14 16 12 4641 f18 4 2 8 6 120 40 80 100 60 50 90 110 70 0lfm 200lfm 400lfm ambient temperature (c) 30 0 current (a) 10 18 14 16 12 4641 f19 4 2 8 6 120 40 80 100 60 50 90 110 70 0lfm 200lfm 400lfm figure 15. power loss at 5v output, (each channel, 25c) figure 16. 5v in to 1.0v out derating curve 4-channel paralleled, no heat sink figure 17. 12v in to 1.0v out derating curve 4-channel paralleled, no heat sink load current (a) 0 0 power loss (w) 0.6 1.8 1.6 1 4641 f15 0.2 0.4 1.2 0.8 1.4 1.0 4 2 3 0.5 3.5 1.5 2.5 12v in ambient temperature (c) 30 0 current (a) 10 18 14 16 12 4641 f16 4 2 8 6 120 40 80 100 60 50 90 110 70 0lfm 200lfm 400lfm ambient temperature (c) 30 0 current (a) 10 18 14 16 12 4641 f17 4 2 8 6 120 40 80 100 60 50 90 110 70 0lfm 200lfm 400lfm ltm4644/LTM4644-1 4644fe
22 for more information www.linear.com/ltm4644 figure 21. 12v in to 1.5v out derating curve 4-channel paralleled, no heat sink figure 22. 5v in to 1.5v out derating curve 4-channel paralleled, bga heat sink figure 23. 12v in to 1.5v out derating curve 4-channel paralleled, bga heat sink figure 24. 5v in to 3.3v out derating curve 4-channel paralleled, no heat sink figure 25. 12v in to 3.3v out derating curve 4-channel paralleled, no heat sink figure 26. 5v in to 3.3v out derating curve 4-channel paralleled, bga heat sink ambient temperature (c) 30 0 current (a) 10 18 14 16 12 4641 f21 4 2 8 6 120 40 80 100 60 50 90 110 70 0lfm 200lfm 400lfm ambient temperature (c) 30 0 current (a) 10 18 14 16 12 4641 f25 4 2 8 6 120 40 80 100 60 50 90 110 70 0lfm 200lfm 400lfm ambient temperature (c) 30 0 current (a) 10 18 14 16 12 4641 f24 4 2 8 6 120 40 80 100 60 50 90 110 70 0lfm 200lfm 400lfm ambient temperature (c) 30 0 current (a) 10 18 14 16 12 4641 f22 4 2 8 6 120 40 80 100 60 50 90 110 70 0lfm 200lfm 400lfm ambient temperature (c) 30 0 current (a) 10 18 14 16 12 4641 f23 4 2 8 6 120 40 80 100 60 50 90 110 70 0lfm 200lfm 400lfm ambient temperature (c) 30 0 current (a) 10 18 14 16 12 4641 f26 4 2 8 6 120 40 80 100 60 50 90 110 70 0lfm 200lfm 400lfm applications information ltm4644/LTM4644-1 4644fe
23 for more information www.linear.com/ltm4644 applications information figure 27. 12v in to 3.3v out derating curve 4-channel paralleled, bga heat sink figure 28. 12v in to 5v out derating curve 4-channel paralleled, no heat sink figure 29. 12v in to 5v out derating curve 4-channel paralleled, bga heat sink figure 30. power loss allowance vs. ambient temperature no heat sink figure 31. power loss allowance vs. ambient temperature bga heat sink ambient temperature (c) 30 0 current (a) 10 18 14 16 12 4641 f28 4 2 8 6 120 40 80 100 60 50 90 110 70 0lfm 200lfm 400lfm ambient temperature (c) 30 0 current (a) 10 18 14 16 12 4641 f27 4 2 8 6 120 40 80 100 60 50 90 110 70 0lfm 200lfm 400lfm ambient temperature (c) 30 0 current (a) 10 18 14 16 12 4641 f29 4 2 8 6 120 40 80 100 60 50 90 110 70 0lfm 200lfm 400lfm ambient temperature (c) 30 0 power loss allowance (w) 10 9 4641 f30 4 2 8 7 6 3 1 5 120 40 80 100 60 50 90 110 70 0lfm 200lfm 400lfm ambient temperature (c) 30 0 power loss allowance (w) 12 10 4641 f31 4 2 8 6 1 11 5 3 9 7 120 40 80 100 60 50 90 110 70 0lfm 200lfm 400lfm ltm4644/LTM4644-1 4644fe
24 for more information www.linear.com/ltm4644 applications information table 3. 1.0v output derating curve v in (v) power loss curve air flow (lfm) heat sink ja (c/w) figures 16, 17 5, 12 figure 9 0 none 12.5 figures 16, 17 5, 12 figure 9 200 none 11 figures 16, 17 5, 12 figure 9 400 none 10 figures 18, 19 5, 12 figure 9 0 bga heat sink 11 figures 18, 19 5, 12 figure 9 200 bga heat sink 9 figures 18, 19 5, 12 figure 9 400 bga heat sink 8 table 4. 1.5v output derating curve v in (v) power loss curve air flow (lfm) heat sink ja (c/w) figures 20, 21 5, 12 figure 11 0 none 12.5 figures 20, 21 5, 12 figure 11 200 none 11 figures 20, 21 5, 12 figure 11 400 none 10 figures 22, 23 5, 12 figure 11 0 bga heat sink 11 figures 22, 23 5, 12 figure 11 200 bga heat sink 9 figures 22, 23 5, 12 figure 11 400 bga heat sink 8 table 5. 3.3v output derating curve v in (v) power loss curve air flow (lfm) heat sink ja (c/w) figures 24, 25 5, 12 figure 14 0 none 12.5 figures 24, 25 5, 12 figure 14 200 none 11 figures 24, 25 5, 12 figure 14 400 none 10 figures 26, 27 5, 12 figure 14 0 bga heat sink 11 figures 26, 27 5, 12 figure 14 200 bga heat sink 9 figures 26, 27 5, 12 figure 14 400 bga heat sink 8 table 6. 5v output derating curve v in (v) power loss curve air flow (lfm) heat sink ja (c/w) figures 26, 27 12 figure 15 0 none 12.5 figures 26, 27 12 figure 15 200 none 11 figures 26, 27 12 figure 15 400 none 10 figures 28, 29 12 figure 15 0 bga heat sink 11 figures 28, 29 12 figure 15 200 bga heat sink 9 figures 28, 29 12 figure 15 400 bga heat sink 8 ltm4644/LTM4644-1 4644fe
25 for more information www.linear.com/ltm4644 applications information v out (v) c in (ceramic) (f) c in (bulk) c out1 (ceramic) (f) c out2 (bulk) (f) c ff (pf) v in (v) droop (mv) p-p deriv ation (mv) recovery time (s) load step (a) load step slew ra te (a/s) r fb (k) 1 10 47 5,12 5 72 40 1 1 90.9 1 10 100f 10 5,12 5 60 40 1 1 90.9 1 10 47 5,12 5 127 40 2 1 90.9 1 10 100f 10 5,12 5 90 40 2 1 90.9 1.2 10 47 5,12 5 76 40 1 1 60.4 1.2 10 100f 10 5,12 5 65 40 1 1 60.4 1.2 10 47 5,12 5 145 40 2 1 60.4 1.2 10 100f 10 5,12 5 103 40 2 1 60.4 1.5 10 47 5,12 5 80 40 1 1 40.2 1.5 10 100f 10 5,12 5 70 40 1 1 40.2 1.5 10 47 5,12 5 161 40 2 1 40.2 1.5 10 100f 10 5,12 5 115 40 2 1 40.2 1.8 10 47 5,12 5 95 40 1 1 30.1 1.8 10 100f 10 5,12 5 80 40 1 1 30.1 1.8 10 47 5,12 5 177 40 2 1 30.1 1.8 10 100f 10 5,12 5 128 40 2 1 30.1 2.5 10 47 5,12 5 125 40 1 1 19.1 2.5 10 100f 10 5,12 5 100 50 1 1 19.1 2.5 10 47 5,12 5 225 40 2 1 19.1 2.5 10 100f 10 5,12 5 161 50 2 1 19.1 3.3 10 47 5,12 5 155 40 1 1 13.3 3.3 10 100f 10 5,12 5 122 60 1 1 13.3 3.3 10 47 5,12 5 285 40 2 1 13.3 3.3 10 100f 10 5,12 5 198 60 2 1 13.3 5 10 47 10 5,12 5 220 40 1 1 8.25 5 10 100f 10 5,12 5 420 40 2 1 8.25 table 7 c in part number value c out1 part number value c out2 part number value murata grm21br61c106ke15l 10f, 16v, 0805, x5r murata grm21br60j476me15 47f, 6.3v, 0805, x5r sanyo 4tpe100mzb 4v 100f taiyo yuden emk212bj106kg-t 10f, 16v, 0805, x5r taiyo yuden jmk212bj476mg-t 47f, 6.3v, 0805, x5r murata grm31cr61c226me15l 22f, 16v, 1206, x5r taiyo yuden emk316bj226ml-t 22f, 16v, 1206, x5r ltm4644/LTM4644-1 4644fe
26 for more information www.linear.com/ltm4644 applications information layout checklist/example the high integration of ltm4644 makes the pcb board layout very simple and easy. however, to optimize its electrical and thermal performance, some layout consid - erations are still necessary. ? use large pcb copper areas for high current paths, including v in1 to v in4 , gnd, v out1 to v out4 . it helps to minimize the pcb conduction loss and thermal stress. ? place high frequency ceramic input and output capaci - tors next to the v in , gnd and v out pins to minimize high frequency noise. ? place a dedicated power ground layer underneath the unit. ? to minimize the via conduction loss and reduce module thermal stress, use multiple vias for interconnection between top layer and other power layers. ? do not put via directly on the pad, unless they are capped or plated over. ? use a separated sgnd ground copper area for com - ponents connected to signal pins. connect the sgnd to gnd underneath the unit. ? for parallel modules, tie the v out , v fb , and comp pins together. use an internal layer to closely connect these pins together. the track/ss pin can be tied a common capacitor for regulator soft-start. ? bring out test points on the signal pins for monitoring. figure 32 gives a good example of the recommended layout. figure 32. recommended pcb layout c out c out c out c in ltm4644/LTM4644-1 4644fe
27 for more information www.linear.com/ltm4644 typical applications figure 33. 4v to 14v input, quad 1.2v, 1.5v, 2.5v and 3.3v output with tracking 4644 f41 v in1 svin1 run1 intv cc1 mode1 v in2 svin2 run2 intv cc2 mode2 v in3 svin3 run3 intv cc3 mode3 v in4 svin4 run4 intv cc4 mode4 sgnd ltm4644 clkin 10f 4 16v 1206 clkout temp gnd v out1 fb1 comp1 track/ss1 pgood1 v out2 fb2 comp2 track/ss2 pgood2 v out3 fb3 comp3 track/ss3 pgood3 v out4 fb4 comp4 track/ss4 pgood4 47f 6.3v 0805 3.3v/4a 4v to 14v 13.3k 0.1f 47f 4v 0805 2.5v/4a 19.1k 60.4k 13.3k 47f 4v 0805 1.5v/4a 40.2k 47f 4v 0805 1v/4a 90.9k 60.4k 13.3k 60.4k 13.3k ltm4644/LTM4644-1 4644fe
28 for more information www.linear.com/ltm4644 typical applications figure 34. 2.375v to 5v input, quad 1v, 1.2v, 1.5v, 1.8v output 4644 f41 v in1 svin1 run1 intv cc1 mode1 v in2 svin2 run2 intv cc2 mode2 v in3 svin3 run3 intv cc3 mode3 v in4 svin4 run4 intv cc4 mode4 sgnd ltm4644 clkin 10f 4 6.3v 1206 clkout temp gnd v out1 fb1 comp1 track/ss1 pgood1 v out2 fb2 comp2 track/ss2 pgood2 v out3 fb3 comp3 track/ss3 pgood3 v out4 fb4 comp4 track/ss4 pgood4 47f 4v 0805 1.8v/4a 2.375v to 5v 1f 6.3v 5v bias 30.1k 0.1f 0.1f 0.1f 0.1f 47f 4v 0805 1.5v/4a 40.2k 47f 4v 0805 1.2v/4a 60.4k 47f 4v 0805 1v/4a 90.9k ltm4644/LTM4644-1 4644fe
29 for more information www.linear.com/ltm4644 figure 35. 4v to 14v input, 4-phase, 1.2v at 16a design with temperature monitoring typical applications 4644 f35 v in1 svin1 run1 intv cc1 mode1 v in2 svin2 run2 intv cc2 mode2 v in3 svin3 run3 intv cc3 mode3 v in4 svin4 run4 intv cc4 mode4 sgnd ltm4644 clkin 22f 2 16v 1206 clkout temp gnd v out1 fb1 comp1 track/ss1 pgood1 v out2 fb2 comp2 track/ss2 pgood2 v out3 fb3 comp3 track/ss3 pgood3 v out4 fb4 comp4 track/ss4 pgood4 47f 3 4v 0805 1.2v/16a v in 4v to 14v 15.1k 0.1f r t v in a/d r t = v in ? 0.6v 100a ltm4644/LTM4644-1 4644fe
30 for more information www.linear.com/ltm4644 figure 36. 4v to 14v input, 4-phase, 1.2v at 16a design with temperature monitoring typical applications 4644 f36 v in1 svin1 run1 intv cc1 mode1 v in2 svin2 run2 intv cc2 mode2 v in3 svin3 run3 intv cc3 mode3 v in4 svin4 run4 intv cc4 mode4 sgnd LTM4644-1 clkin 22f 2 16v 1206 clkout temp gnd v out1 fb1 comp1 track/ss1 pgood1 v out2 fb2 comp2 track/ss2 pgood2 v out3 fb3 comp3 track/ss3 pgood3 v out4 fb4 comp4 track/ss4 pgood4 47f 3 4v 0805 1.2v/16a v in 4v to 14v 60.4k 60.4k 0.1f r t v in a/d r t = v in ? 0.6v 100a ltm4644/LTM4644-1 4644fe
31 for more information www.linear.com/ltm4644 typical applications figure 37. 12v and 5v tw o separate input rails, 1.2v at 8a and 3.3v at 8a output 4644 f36 v in1 svin1 run1 intv cc1 mode1 v in2 svin2 run2 intv cc2 mode2 v in3 svin3 run3 intv cc3 mode3 v in4 svin4 run4 intv cc4 mode4 sgnd ltm4644 clkin 22f 2 16v 1206 clkout temp gnd v out1 fb1 comp1 track/ss1 pgood1 v out2 fb2 comp2 track/ss2 pgood2 v out3 fb3 comp3 track/ss3 pgood3 v out4 fb4 comp4 track/ss4 pgood4 47f 2 4v 0805 1.2v/8a 5v 22f 2 16v 1206 12v 30.2k 47f 2 6.3v 0805 3.3v/8a 0.1f 6.65k 0.1f ltm4644/LTM4644-1 4644fe
32 for more information www.linear.com/ltm4644 typical applications figure 38. LTM4644-1 together with ltc2975, 4.5v to 14v input, 3.3v, 2.5v, 1.5v, 1v output at 4a each with input and output voltage, current and temperature telemetry. 19.1k 10.0m 60.4k 1k 0.1f 0.1f 0.1f 100 100 10nf 10nf 47f 10.0k 1k 10nf v out2 2.5v/4a 40.2k 10.0m 60.4k 1k 0.1f 100 100 10nf 10nf 47f 10.0k 1k 10nf v out3 1.5v/4a 90.9k 10.0m 60.4k 1k 0.1f 100 100 10nf 10nf 47f 10.0k 1k 10nf v out4 1.0v/4a 13.3k 10.0m 10.0m temp clkout clkin fb1 fb2 fb3 60.4k 60.4k 60.4k fb4 run1 run2 run3 run4 mode4 pgood4 pgood3 pgood2 pgood1 comp1 comp2 comp3 comp4 track/ss1 track/ss2 track/ss3 track/ss4 LTM4644-1 mode3 mode2 mode1 gnd sgnd v out1 v out2 v out3 v out1 v out2 v out3 intv cc4 intv cc2 intv cc3 sv in4 sv in3 sv in2 v in4 v in 4.5v to 14v v in3 v in2 intv cc1 sv in1 v in1 v out4 60.4k 1k 0.1f 100 100 10nf 10nf 47f 10.0k 1k 10nf u6 tsense0 tsense1 tsense2 tsense3 vpwr vin_sns vin_sns_cap wdi/resetb pwrgd ltc2975 auxfaultb share_clk faultb0 faultb1 scl sda alertb control0 control1 control2 control3 asel0 asel1 wp refp refm iin_snsp iin_snsm isensep0 isensem0 vsensep0 isensep1 isensem2 vsensem2 isensep2 isensep3 vsensep3 vsensem3 isensem3 isensem1 vsensem1 vsensep2 vsensep1 vsensem0 channel 0 vdac0 vdac1 vdac2 vdac3 gnd 0.1f 0.1f 10k 4644 f38 10k 10k 10k 10k 10k 10k 10k 10k 10k 10k v dd25 v dd33 19 14 12 vout_en0 vout_en1 vout_en2 vout_en3 v out1 3.3v/4a 0.1f 40.2k 0.1f 19.1k 13.3k channel 1 channel 2 channel 3 ltm4644/LTM4644-1 4644fe
33 for more information www.linear.com/ltm4644 ltm4644/LTM4644-1 component bga pinout package description package row and column labeling m ay vary among module products. review each package layout carefully. pin name pin name pin name pin name pin name pin name a1 v out1 b1 gnd c1 v out2 d1 v out2 e1 gnd f1 v out3 a2 v out1 b2 gnd c2 pgood2 d2 v out2 e2 gnd f2 pgood3 a3 v out1 b3 v in1 c3 pgood1 d3 gnd e3 v in2 f3 temp a4 gnd b4 v in1 c4 intv cc1 d4 gnd e4 v in2 f4 intv cc2 a5 gnd b5 sv in1 c5 gnd d5 gnd e5 sv in2 f5 gnd a6 track/ss1 b6 mode1 c6 run1 d6 track/ss2 e6 mode2 f6 run2 a7 fb1 b7 comp1 c7 clkin d7 fb2 e7 comp2 f7 sgnd pin name pin name pin name pin name pin name g1 v out3 h1 gnd j1 v out4 k1 v out4 l1 gnd g2 v out3 h2 gnd j2 pgood4 k2 v out4 l2 gnd g3 gnd h3 v in3 j3 clkout k3 gnd l3 v in4 g4 gnd h4 v in3 j4 intv cc3 k4 gnd l4 v in4 g5 gnd h5 sv in3 j5 gnd k5 intv cc4 l5 sv in4 g6 track/ss3 h6 mode3 j6 run3 k6 track/ss4 l6 mode4 g7 fb3 h7 comp3 j7 fb4 k7 run4 l7 comp4 ltm4644/LTM4644-1 4644fe
34 for more information www.linear.com/ltm4644 bga package 77-lead (9mm 15mm 5.01mm) (reference ltc dwg # 05-08-1900 rev d) package top view 4 pin ?a1? corner y x aaa z aaa z bga package 77-lead (15.00mm 9.00mm 5.01mm) (reference ltc dwg# 05-08-1900 rev d) notes: 1. dimensioning and tolerancing per asme y14.5m-1994 2. all dimensions are in millimeters ball designation per jesd ms-028 and jep95 5. primary datum -z- is seating plane 6. solder ball composition is 96.5% sn/3.0% ag/0.5% cu 4 3 details of pin #1 identifier are optional, but must be located within the zone indicated. the pin #1 identifier may be either a mold or marked feature detail a ?b (77 places) detail b substrate a a1 b1 ccc z detail b package side view mold cap z m x yzddd m zeee symbol a a1 a2 b b1 d e e f g h1 h2 aaa bbb ccc ddd eee min 4.81 0.50 4.31 0.60 0.60 0.36 3.95 nom 5.01 0.60 4.41 0.75 0.63 15.00 9.00 1.27 12.70 7.62 0.41 4.00 max 5.21 0.70 4.51 0.90 0.66 0.46 4.05 0.15 0.10 0.20 0.30 0.15 notes dimensions total number of balls: 77 a2 d e // bbb z z h2 h1 bga 77 0113 rev d tray pin 1 bevel package in tray loading orientation component pin ?a1? ltmxxxxxx module detail a package bottom view 3 see notes a b c d e f g h j k l pin 1 e b f g 7 6 5 4 3 2 1 suggested pcb layout top view 0.000 2.540 3.810 5.080 6.350 1.270 3.810 2.540 1.270 5.080 6.350 3.810 2.540 1.270 3.810 2.540 1.270 0.3175 0.3175 0.000 0.630 0.025 ? 77x 7 package row and column labeling may vary among module products. review each package layout carefully ! 7 see notes package description please refer to http://www .linear.com/product/ltm4644#packaging for the most recent package drawings. ltm4644/LTM4644-1 4644fe
35 for more information www.linear.com/ltm4644 information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. revision history rev date description page number a 01/14 add snpb bga package option 1, 2 b 06/14 add tech clip video link update order information update run threshold update figure 5 update soft-start and output voltage tracking section 1 2 3 13 14 c 05/16 added mp-grade (C55c to 125c) 2 d 12/16 added LTM4644-1 added comparison table between ltm4644 and LTM4644-1 added output voltage programing (LTM4644-1) added figure 36 added figure 38 1 ,2, 4, 9, 10, 33 1 10 30 32 e 01/18 changed i outpk (min) from 5a to 6a 3 ltm4644/LTM4644-1 4644fe
36 for more information www.linear.com/ltm4644 subject description module design and manufacturing resources design: ? selector guides ? demo boards and gerber files ? free simulation tools manufacturing: ? quick start guide ? pcb design, assembly and manufacturing guidelines ? package and board level reliability module regulator products sear ch 1. sort table of products by parameters and download the result as a spread sheet. 2. search using the quick power search parametric table. techclip videos quick videos detailing how to bench test electrical and thermal performance of module products. digital power system management linear technologys family of digital power supply management ics are highly integrated solutions that offer essential functions, including power supply monitoring, supervision, margining and sequencing, and feature eeprom for storing user configurations and fault logging. ? analog devices, inc. 2013 lt 0118 rev e ? printed in usa www.linear.com/ltm4644 package photo related parts part number description comments ltm4624 14v in , 4a step-down module regulator in tiny 6.25mm 6.25mm 5.01mm bga 4v v in 14v, 0.6v v out 5.5v, v out tracking, pgood, light load mode, complete solution in 1cm 2 (single-sided pcb) ltm4619 dual 26v, 4a step-down module regulator 4.5v v in 26.5v, 0.8v v out 5v, pll input, v out tracking, pgood, 15mm 15mm 2.82mm lga ltm 4618 26v, 6a step-down module regulator 4.5v v in 26.5v, 0.8v v out 5v, pll input, v out tracking, 9mm 15mm 4.32mm lga ltm 4628 dual 26v, 8a step-down module regulator 4.5v v in 26.5v, 0.6v v out 5.5v, remote sense amplifier, internal temperature sensing output, 15mm 15mm 4.32mm lga ltm4614 dual 5v, 4a module regulator 2.375v v in 5.5v, 0.8v v out 5v, 15mm 15mm 2.82mm lga ltm4608a 5v, 8a step-down module regulator with tracking, margining and frequency synchronization 2.7v v in 5.5v, 0.6v v out 5v, pll input, clock output, v out tracking and margining, pgood, 9mm 15mm 2.82mm lga ltm4616 dual 5v, 8a step-down module regulator with tracking, margining and frequency synchronization 2.7v v in 5.5v, 0.6v v out 5v, pll input, clock output, v out tracking and margining, pgood, 15mm 15mm 2.82mm lga ltm8045 inverting or sepic module dc/dc converter with up to 700ma output current 2.8v v in 18v, 2.5v v out 15v, synchronizable, no derating or logic- level shift for control inputs when inverting, 6.25mm 11.25mm 4.92mm bga ltm8001 36v, 5a step-down module regulator with configurable array of five 1a ldos 6v v in 36v, 0v v out 24v, five parallelable 1.1a 90v rms output noise ldos, synchronizable, adjustable switcher output current limit, 15mm 15mm 4.92mm bga lt c ? 2978 octal digital power supply manager with eeprom i 2 c/pmbus interface, configuration eeprom, fault logging, 16-bit adc with 0.25% tue, 3.3v to 15v operation ltc2974 quad digital power supply manager with eeprom i 2 c/pmbus interface, configuration eeprom, fault logging, per channel voltage, current and temperature measurements design resources ltm4644/LTM4644-1 4644fe

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